Certain electrical problems, such as: simultaneous switching noise, time delay, cross-talk and ground/power bounce, emerge as the result of increased operating frequency, trace density and package size miniaturization. The characteristics of the designed package have to be evaluated to improve its electrical performance before volume production. ChipMOS’ simulation methods have been utilized to make 2D/3D models for extracting the RLC (Resistance, Inductance and Capacitance) parameters. Thus, the electrical performance of package can be verified before production process.
Our customers will be provided with following data:
- RLC data for critical nets / longest and shortest trace (lead), including: Self inductance (Ls), Mutual Inductance (Lm), Load capacitance (CL), Mutual capacitance (Cm),Resistance(R)
- S parameter
- Spice model
- Equivalent transmission line circuits
- Impedance (Z)
- Time Delay
CAD Tools and Industry Link
This tool can be used to extract the RLC data with 2D or 3D models. Equivalent SPICE files can also be obtained and time domain transient can be simulated.
HFSS delivers 3-D full-wave accuracy for components to enable RF and high-speed design. from using 3D models to full extraction of s-parameters of the package using 3D electromagnetic simulatorsAnsoftlink (Cadence APD interface)
This tool can help to transform 3D models directly from layout tools; such as: Cadence APD, … etc